DMA Controller

There is a DMA (Direct Memory Access) Controller which can perform block transfers between the SRAM, SDRAM, Audio FIFOs, and VGA Adapter. It can only transfer blocks less than 65536 bytes.

Device

DMA Controller

Configuration

Maximum 65536 byte blocks, connects SRAM, SDRAM, Audio FIFOs, and VGA Adapter

Input/Output

both

Address Base

0xff1180

Address Map

Address	R/W	Description
base	R/W	Status Register contains status bits see Note 1
base+4	R/W	ReadAddress Register stores memory location to read from
base+8	R/W	WriteAddress Register stores memory location to write to
base+12	R/W	Length Register stores number of bytes to transfer
base+16	R/W	Not used
base+20	R/W	Not used
base+24	R/W	Control Register - See Note 2

Initialization

None

Interrupts

Triggered	When DONE bit is high (ie. A DMA transaction has completed)
IRQ Line	13
Enable	Set I_EN bit in Control register high
Acknowledge	Write zero to Status register

Hardware Setup

None

Reference

Altera DMA Controller Datasheet

Notes

The Status Register uses only the least significant 5 bits, the pinout is as follows:

Bit	Name	Description
0	DONE	Indicates the transaction finished, write zero here to clear it
1	BUSY	A transaction is in progress
2	REOP	Read side end-of-packet (unused)
3	WEOP	Write side end-of-packet (unused)
4	LEN	Length register was decremented to 0

The Control Register uses only the least significant 7 bits, the pinout is as follows:

Bit	Name	Description
0	BYTE	Specifies byte at-a-time transfer
1	HWORD	Specifies half-word (16-bit) at-a-time transfer
2	WORD	Specifies word (32-bit) at-a-time transfer
3	GO	Enables DMA transactions
4	I_EN	Enable interrupts - occur when DONE is high
5	REEN	End on read-side end-of-packet (unused)
6	WEEN	End on write-side end-of-packet (unused)
7	LEEN	End transaction after Length register reaches zero
8	RCON	Reads from a constant address when RCON=1
9	WCON	Writes to a constant address when WCON=1
10	DWORD	Specifies double-word at-a-time transfer
11	QWORD	Specifies quad-word at-a-time transfer

Assembly Example: Copy a string on the SDRAM to the SRAM

.equ ADDR_SRAM, 0x800000
.equ ADDR_SDRAM, 0x1000000
.equ ADDR_DMA, 0xff1180

  movia r2,ADDR_DMA

  movia r3,STRING
  stwio r3,4(r2)      /* Set DMA Read Address */

  movia r3,ADDR_SRAM
  stwio r3,8(r2)      /* Set DMA Write Address */

  movia r3,STRINGLENGTH
  stwio r3,12(r2)     /* Set DMA length */

  movi  r3,0b10001001 /* Set control bits:  bit0 - byte at a time */
                                      /*    bit3 - GO */
                                      /*    bit7 - Till length goes to 0 */
  stwio r3,24(r2)     /* Set DMA control */

WAIT:
  ldwio r3,0(r2)
  andi  r3,r3,1
  beq   r3,r0,WAIT    /* Spin until DONE bit goes high */

  stwio r0,(r2)       /* Clear status register - zero DONE flag */
  stwio r0,24(r2)     /* Clear control register - zeros GO bit */

STOP: br STOP

.equ STRINGLENGTH, 80
STRING:
.asciz "Hello World! I should be transferred from SDRAM to SRAM using the DMA controller"