The random number generator outputs a new 32-bit random number on every clock cycle.
| Device | Random Number Generator | ||||||
| Configuration | 32-bit | ||||||
| Input/Output | Both | ||||||
| Address Base | 0xff11a0 | ||||||
| Address Map |
|
For the most part, you likely won't ever need to worry about the fact that the generator does not give truly random output, but if necessary you can help the situation through the concept of seeding the pseudo random number generator.
The Random Number Generator generates random numbers between 0x00000000 and 0xFFFFFFFF every clock cycle. However, from the moment you configure the FPGA, the same sequence of random numbers are generated everytime, making the generator a psuedo random number generator instead of a truly random number generator.
Because the amount of time you spend typing in the terminal to download your program to the board is random (closer to truly random), you can seed the Random Number Generator it with the output from the Random Number Generator itself at the start of your program. This gives you a difference sequence of numbers.
.equ ADDR_RNG, 0xff11a0 movia r2,ADDR_RNG ldwio r3,(r2)
.equ ADDR_RNG, 0xff11a0 movia r2,ADDR_RNG ldwio r3,(r2) stwio r3,(r2)
#define RandomNum ((volatile long *) 0xff11a0)
#define ADDR_7SEGS ((volatile long *) 0xff1100)
long rando;
int main()
{
int i;
while (1)
{
rando = *RandomNum;
*ADDR_7SEGS = rando;
// Create a delay, so that we can observe the number on 7-segment displays
for (i=0; i<100000000;i++);
}
}